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Day 340 of 365 · Expert · Month 12: Masterpieces

Alarm centre

The alarm centre: collect alarms as bits, weight them by danger and warning, acknowledge new alarms and keep a history with a counter and the last event.

Lesson 22 min Week 49

What you learn today

  • Collect and weight alarms
  • Acknowledge
  • History

When everything beeps at once, nobody listens any more. An alarm centre collects the base's alarms, decides which ones get loud and remembers what happened. You know the tool for it from bit week.

Collecting alarms

Every alarm gets a bit in one single register:

BitAlarmWeight
0oxygen below 18 %danger
1pressure below 80 kPadanger
2temperature above 40 °Cwarning
3sensor missingdanger

If the sensor is missing, all comparisons are 0. Bit 3 makes sure it is noticed anyway – a silent sensor is an alarm in itself.

Weighting

Danger means: klaxon and light. Warning means: light only. A mask decides which bits are dangerous: %1011 are bits 0, 1 and 3. Whoever wants to reclassify an alarm later only changes the define.

Acknowledging

An alarm is only done once a person has seen it. That is why the klaxon does not run while an alarm is active, but while it is unacknowledged. The chip finds new alarms with the same edge detection as in the flag register:

not tmp alt
and new active tmp           # active now and not before
move alt active
or pending pending new         # pending until acknowledged
and tmp pending GEFAHR             # only dangerous bits sound

Pressing “Quittung” clears the pending alarms. The klaxon goes quiet, the flashing light stays on until the cause is really fixed. If a new alarm comes after that, it sounds again.

History

A counter counts every alarm event, a Logic Memory keeps the last new alarm as a bit pattern. Whoever comes into the base after a night sees that something happened and what – even if everything has long been green again.

Warning

Acknowledging fixes nothing. A chip that also switches off the flashing light after acknowledging hides a running fault.

Diagram

The register bank of the chip r0 42 r1 31 r2 10 r3 -2.5 r4 0 r5 0 r6 0 r7 0 r8 0 r9 0 r10 0 r11 0 r12 0 r13 0 r14 0 r15 0 sp = r16 ra = r17 16 free registers, one number each sp: stack pointer · ra: return address
Every bit is an alarm. With not and and the chip finds the new ones, with a mask the dangerous ones.

Exercise

Task

Build the alarm centre according to the table above. Sensor “Basis”, display “Alarmcode” (active bits), klaxon “Alarm” (on while a dangerous alarm is unacknowledged), flashing light “Alarm” (on while any alarm is active), button “Quittung”, display “Alarmzahl” (number of alarm events) and Logic Memory “Letzter_Alarm” (bits of the last new alarm).

Hints

Hint 1

Bits with slt/sgt and ins active tmp N 1, bit 3 with snan tmp p.

Hint 2

New: not tmp alt, and new active tmp, move alt active, then or pending pending new.

Hint 3

Klaxon: and tmp pending GEFAHR, snez. Only write the last alarm when new is not 0.

Quiz

4 questions. You pass from 60 % – the server does the grading.

Complete the day

  • Passed the simulator exercise
  • Passed the quiz with at least 60 %

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